What I accomplished today:
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Learned how to calculate Network performance given different conditions.
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Read about the TCP protocol and how it implements the Sliding Window Protocol.
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Learned about CRC and other types of basic error detection/correction in Framing Protocols.
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Worked on my Senior Project with the NetFPGA
- Finished installing Xilinx ISE updates and started playing around with the reference projects more.
- Familiarizing myself with the workflow of a NetFPGA project.
TODO:
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Learn how to use Xilinx ISE with IP pack to generate bitfiles from verilog projects with the NetFPGA. – Talk to Jake or Dr. Kredo on this
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Compile and Implement my own bitfile.
- This might not be that hard if everything is the same as here
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Get ModelSim somehow
Interesting links: http://www.ibm.com/developerworks/linux/library/l-linux-networking-stack/ http://www.intel.com/content/dam/doc/application-note/gbe-controllers-interrupt-moderation-appl-note.pdf http://lwn.net/Articles/139884/